搜索资源列表
95zlg_avalon_lcd128_64
- 周立功公司推出的IP核，此IP核为12864驱动IP核。-ZLG has introduced the IP core, IP core, 12864 drivers for this IP core.
pci32tlite_oc_latest.tar
- pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC s in ALTERA CYCLONE II FPGA).-pci32 taget core ip, The core has been designed to p
VGA
- 应用VEROLOG HDL编写的VGA的IP核，可用于SOPC BUILDER中-the control of the i2c bus
VOIP.tar
- Voice Over IP Phone - implementation in fpga
fftip
- 2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发-Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development
DE0_VGA
- 基于fpga的VGA程序代码，已经测试成功-VGA-based fpga code has been tested successfully
How-to-adiet-a-ip-core
- 告诉你如何编写一个IP核，对于FPGA 的学习很有帮助-Tell you how to write a IP core, FPGA' s very helpful for
fft_2011_3_23(COMPLETE-FFT1024)
- VERILOG FFT IP核调用，以及其控制文件-VERILOG FFT IP core call, as well as its control file
DE2_Video_SOPC_Builder_Demos
- FPGA与SOPC相结合，开成发视频播放的软ip核，可以直接使用-The combination of FPGA and SOPC, open into the hair soft ip video core, can be used directly
verilog-usb--protel-design
- 基于FPGA的usb2.0 ip核设计，所用的语言是verilog-FPGA-based usb2.0 ip core design, the language used is the verilog
FPGAziliao
- 关于FPGA设计的几本书： FPGA的IP模块设计方法 FPGA开发全攻略 FPGA设计的四种常用思想与技巧 FPGA设计及应用-Several books on the FPGA design: FPGA for FPGA IP block design methodology developed Raiders four common FPGA design ideas and techniques and application of FPGA Design
fft_ug
- altera的FFT IP核的用户手册，介绍了如何使用ALTERA IP核生成FFT核，如何设置参数并讲述了如何仿真，适用于通信方面的FPGA设计工程师，学生。-altera' s FFT IP core user manual describes how to use the ALTERA IP core generated FFT core, how to set parameters and describes how to simulate, for communications, FP
sine
- FPGA的IP核实现发出高质量正弦波的工程-Issue of FPGA IP cores to achieve high-quality sine wave
Altera.FPGA
- fpga的入门教程。关于硬件ip设置的指南-something about fpga
FPGA-chuankoutongxin
- 实现fpga的串口通信，采用自顶向下的设计方法设计异步串口的ip核-Fpga implementation of serial communication, use of top-down design methods for asynchronous serial ip nuclear
AES-sopc--ip
- 在FPGA上实现了AES，并写了基于AVALON总线的接口，主要使用是VHdL实现，并在SOPC系统上定制了IP核。-FPGA to realize the AES, and write the AVALON based on the bus interface, the main use is VHdL implementation, and the SOPC system in custom made IP core.
LCD_controller
- 基础FPGA的LCD1602IP核设计,包括了硬体和软体的驱动，并有详细讲解-Using FPGA to designed the IP for lcd1602
wp-01133-ip-camera
- Building an IP Surveillance Camera System with a Low-Cost FPGA
nios-2ISP1362
- nios fpga changyong IP Core-nios fpga IP Core
Nexys3_BSB_Support_v_2_4
- xilinx FPGA 15个免费IP Core-xilinx FPGA IP Core